A New Algorithm for Analog Background Calibration in High Speed Analog to Digital Convertors

Authors

  • Kuresh Ghanbari
  • Milad Abtin

Keywords:

Algorithm, pipeline ADC, analog background calibration, error detection

Abstract

In this paper a new algorithm for analog background calibration in pipeline ADCs is presented. The algorithm is based on error detection and separation of the stages without requiring the reference voltage. The error detection is digital based and correction is analog based and execute on MDAC of each stage. Simulations results for calibrating a 12-bit pipeline ADC demonstrated that with this method, ENOB can be corrected from 6.82 to 11.72 bits. The algorithm can be used in all kinds of pipeline ADCs

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Published

2016-12-30

Issue

Vol. 3 No. 2 (2016)

Section

Articles

How to Cite

Ghanbari, K., & Abtin, M. (2016). A New Algorithm for Analog Background Calibration in High Speed Analog to Digital Convertors. International Academic Journal of Science and Engineering, 3(2), 87-96. https://iaiest.com/iaj/index.php/IAJSE/article/view/IAJSE1510033